1. Field of the Invention
The present invention relates to a micro device manufacturing method and an apparatus therefor, and in particular, to an exposure method and a substrate polishing apparatus in manufacturing micro devices such as semiconductor devices, liquid crystal display devices, etc.
2. Related Background Arts
In the case where micro devices such as semiconductor devices, liquid crystal display devices and the like are manufactured, there has usually been used an exposure apparatus which exposes a pattern formed on a reticle (or a photo mask and the like) onto a shot area on a wafer (or a glass plate and the like) on which a photosensitive material is applied. For this kind of exposure apparatus, an exposure apparatus of a so-called step-and-repeat type has been frequently used which repeat operations of sequentially exposing the pattern on the reticle onto the shot area on a wafer. Recently, there has been developed a projection exposure apparatus of a so-called step-and-scan type which exposes the pattern on the reticle onto an area wider than an exposure field of an projection optical system by scanning the reticle and the wafer at the same time.
Incidentally, since, a semiconductor device is, for example, produced by superimposing a plurality of layers of circuit patterns on the wafer, when circuit patterns of a second layer or a later layer are exposed on the wafer, alignment of each shot area of the wafer already formed with the circuit pattern with the pattern image of the reticle, that is alignment of the wafer with the reticle, must be precisely performed. For this purpose, there has been usually adopted a method wherein one or more wafer masks for alignment are formed on the wafer together with the reticle pattern and the wafer marks are used for aligning the circuit patterns of a subsequent layer.
There are several alignment sensors used for measuring the position of a wafer mark, which systems include an LSA (Laser Step Alignment) system which measures the position of a mark by irradiating a laser beam to a wafer mark on a wafer and detecting a diffracted and/or diffused light, an FIA (Field Image Alignment) system which measures the position of the wafer by image processing the wafer mark illuminated by a light emitted by a halogen lamp and having a wide wavelength band width, or an LIA (Laser Interferometric Alignment) system which measures the position of the wafer mark by irradiation with bi-directional laser beams, the frequencies of which are slightly different, causing two diffracted beams to interfere with each other and then detects the phase of the interfered beams. Of these systems, the LIA system conforms; to a flattening technique explained hereinafter, since it is most effective to detect the position of the wafer mark on the wafer which has a rough surface or a surface difference in level which is small.
Incidentally, the shape, number or size of the wafer mark for alignment is selected in correspondence with resolution of the projection optical system of the exposure apparatus, a required accuracy in alignment, a condition of the layer on the wafer, etc. There have usually been used many kinds of shapes, such as slit-like shape, dot-like shape or cross-like shape. However, in the past, most of these wafer marks have had relatively large recesses or concave portions; (having 4 .mu.m width, 6 .mu.m width and the like) and are formed with a concave and convex pattern, said pattern being periodically arranged between adjacent convex portions.
Multi-layer interconnection is a requisite of high integration and high densification as seen in a super LSI. In this technology, a technique for flattening the surface of a film or membrane of a predetermined layer is very important. This flattening technique is indispensable not only for realizing multi-layer interconnection but also for a process of producing an integrated circuit of the multi-layer structure. Such a flattening technique is usually performed by a chemical method such as an anodic oxidation method, a resin coating method, a glass flow method, an etch back method, a lift off method, a bias spatter method and the like. However, in addition to the above methods, a process (a chemical and mechanical polishing process) for chemically and mechanically polishing the surface of the film formed on the substrate by the above mentioned method is practiced as occasion demands.
A general structure of a substrate polishing apparatus for polishing the surface of a film on the substrate is shown in FIG. 12. In FIG. 12, a wafer 124 is held by vacuum suction by means of a vacuum suction table 125 with a surface 124a (hereinafter referred to as pattern formation surface) on which a pattern layer and an upper layer film or membrane are formed. The wafer 124 held by vacuum suction on the vacuum suction table 125 is rotatable in the direction of rotation 300B of a rotary table 136, since the vacuum suction table 125 is placed on a rotary table 126 which can rotate in one direction.
A polishing surface plate 122 having a polishing pad 123 is disposed at a position that faces with the pattern formation surface 124a of the wafer 124 on the suction table 125. The polishing pad 123 rocks or oscillater in the same direction as the movement of a rocking table 121, since the polishing surface plate 122 is held by the rocking table 121.
Moreover, a polishing agent supplying nozzle 127 for supplying a polishing agent to the pattern formation surface is provided. The polishing agent is supplied by the polishing agent supplying nozzle 127 between the pattern formation surface 124a and the polishing pad 123, and at the same time at least one of the vacuum suction tables 125 and the polishing surface plate 122 moves upward and downward direction 300A to cause the polishing pad 123 moving in response to rocking movement of the rocking table 121 and the wafer 124 rotating in response to the rotation of the rotary table 126 to contact, thereby polishing the pattern formation surface 124a (the upper most film formed on the upper layer of pattern layers) on the substrate 124.
However, when the flattening process is performed by chemical and mechanical polishing, a phenomenon of so-called dishing which creates a dish-like concave portion or depression on the surface of the film or membrane results, if there is one or more concave portions or recesses having a width of not less than 2 .mu.m on an under layer pattern of a metallic film or membrane which is beneath the film to be flattened. Accordingly, a same phenomenon such as stated above will occur on the surface of the membrane formed on a concave and convex pattern, if the wafer mark has relatively large concave portion (4 .mu.m width, 6 .mu.m width and the like) like a conventional wafer mark and if they are formed only by periodichally arranged concave and convex patterns. A state of the dishing is shown in FIGS. 8(a) and 8(b).
FIG. 8(a) shows a state wherein an oxide film or membrane 92 is formed on a substrate 93 such as a wafer and recess or concave portion 90a has been formed in the oxide film by an etching, thereafter, a metallic coat 91 is formed on the oxide film by a spattering of aluminum. FIG. 8(b) shows the state wherein said chemical and mechanical polishing is thereafter practiced on a product shown in FIG. 8(a). In FIG. 8(b) a dish-like portion D1 is created by dishing above the concave portion 90a when the width of the concave portion 90a is not less than 2 .mu.m. Dishing as shown in FIG. 8(b) is caused when a pattern in which a plurality of concave portions or recesses 90b are periodically arranged is formed on a substrate and the metallic coat 91 is coated on the pattern. In this case, if a chemical and mechanical polishing is practiced on the coat, a large dish-like portion D2 is created by dishing above the concave portions 90b as shown in FIG. 9(b). Accordingly, when a wafer mark M including a line and space pattern formed by periodically arranging convex portions 90c as shown in FIG. 9(c) is used, a large dish-like portion D3 is created by dishing above the wafer mark M. For this reason, an observed image of the wafer mark is distorted when it is detected by the alignment system and accuracy of alignment is reduced.
If the pattern formation surface (the upper most film formed of the pattern layer) is polished using the above mentioned substrate polishing apparatus, there is a problem that the thickness of the film, particularly, at a position between a pattern and the other pattern adjacent to the former pattern becomes asymmetrical.
For example, in FIG. 12, there is provided with a polishing surface plate 122 that rocks leftward and rightward 300A with respect to the wafer 124 that rotates in response to the rotation of the rotary table 126. However, since a relative polishing direction between the wafer and the polishing pad becomes always constant, when the cross-section of the wafer 124 is observed, a polishing force (intensity of polishing) at a region R.sub.1y, R.sub.2y (hereinafter referred to as a region between patterns) between a pattern Y.sub.1 formed on the wafer 124 and other patterns Y.sub.2, Y.sub.3 adjacent to the pattern Y.sub.1 offsets in the regions R.sub.1y, R.sub.2y between the patterns and therefore, the surface 124a is partially and deeply ground in said regions R.sub.1y, R.sub.2y, to cause the film thickness 34b of the regions R.sub.1y, R.sub.2y between the patterns to become asymmetrical.
If the film thickness of the upper layer film at a region between the patterns constituting the alignment mark becomes asymmetrical, there is an occasion that a detecting position of the alignment mark is displaced.